Search - uart fpga

[Other] uart_rx

Description: Tcode is in VERILOG HDL (Hardware description language) code is of UART (universal asynchronous receiver&transmitter) receiver . its objective is to accept serial data from port of computer and allow it to come in a FPGA-Tcode is in VERILOG HDL (Hardware description language) code is of UART (universal asynchronous receiver&transmitter) receiver . its objective is to accept serial data from port of computer and allow it to come in a FPGA
Platform: | Size: 1024 | Author: hassan | Hits:

[Com Port] llm0308_myUART

Description: FPGA通信模块设计程序，比较详细~UART程序-FPGA communication module design process, more detailed ~
Platform: | Size: 654336 | Author: 杨斌 | Hits:

[VHDL-FPGA-Verilog] Mars_EP1C3_S_Core_V2.0

Description: 此包中为Mars_EP1C3_S_Core_V2.0 FPGA学习板中的接口实验代码.共包括10个实验源代码:7段数码管,i2c,KEYSCAN,MCU,PS2,UART,VGA，蜂鸣器，跑马灯和拨码开关. -This learning package for Mars_EP1C3_S_Core_V2.0 FPGA board interface test code. A total of 10 experiments, including source code: 7 segment digital tube, i2c, KEYSCAN, MCU, PS2, UART, VGA, buzzer, marquees and dial switch.
Platform: | Size: 2184192 | Author: wzh | Hits:

[VHDL-FPGA-Verilog] uart

Description: 用veriolg 语言编写的串口通讯程序，通过FPGA控制串口的通讯。-a veriog program completed on FPGA to contrlo a uart to communicaton with a computer
Platform: | Size: 1024 | Author: dujuan | Hits:

[VHDL-FPGA-Verilog] USB

Description: FPGA数字电子系统设计与开发实例I2C UART VGA USB,可编程器件开发通用模块-FPGA digital electronic system design and development examples I2C UART VGA USB, programmable device of common modules
Platform: | Size: 140288 | Author: 王世臣 | Hits:

[VHDL-FPGA-Verilog] iic-spi-uart

Description: 基于FPGA的IIC,SPI,UART接口协议的实现。-FPGA-based IIC, SPI, UART interface protocol implementation.
Platform: | Size: 2369536 | Author: Air | Hits:

[VHDL-FPGA-Verilog] UART

Description: 利用FPGA接受232芯片的串口数据，可以与PC进行串口通信-FPGA chip using the serial data received 232, serial communication with PC
Platform: | Size: 1189888 | Author: 杨然 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 语言：verilog语言功能：通过串口控制模块，实现FPGA与串口通信。仿真环境：modelsim 综合环境：quartus -Language: verilog language function: through the serial port control module, FPGA and serial communication. Simulation Environment: modelsim integrated environment: quartus II
Platform: | Size: 64512 | Author: huangjiaju | Hits:

[VHDL-FPGA-Verilog] UART

Description: 用硬件描述语言实现的uart的IPcore，有详细的注释和测试文件-Hardware description language of the H.264 encoder, detailed notes and test files
Platform: | Size: 22528 | Author: wt | Hits:

[VHDL-FPGA-Verilog] UART

Description: 基于FPGA的UART设计程序，程序完整测试成功，可以在此基础上完善-UART FPGA-based design process, the program successfully complete the test, you can improve on this basis
Platform: | Size: 3072 | Author: 王东明 | Hits:

[VHDL-FPGA-Verilog] uart

Description: FPGA基于串口指令的多电机闭环调速系统-FPGA based multi-port instruction Motor Closed Loop System
Platform: | Size: 2141184 | Author: ace | Hits:

[VHDL-FPGA-Verilog] Uart

Description: fpga verilog语言，写的串口通讯，经测试完全没有问题-fpga verilog uart communication
Platform: | Size: 1988608 | Author: 孙祥龙 | Hits:

[Com Port] uart

Description: Code VHDL/Verilog for UART FPGA: Xilinx, Altera-Code VHDL/Verilog for UART FPGA: Xilinx, Altera...
Platform: | Size: 11264 | Author: NgocAnh | Hits:

[VHDL-FPGA-Verilog] UART-FPGA

Description: verilog的UART通信，解决了接受过程中的毛刺问题，将接受和发送两个过程独立开来-The UART verilog communication, solve problems receiving glitches during the process of receiving and sending two separate open
Platform: | Size: 9929728 | Author: shenxudong | Hits:

[Other] UART

Description: uart fpga codigo abierto.com
Platform: | Size: 4096 | Author: jorgeandres2016 | Hits:

[VHDL-FPGA-Verilog] uart

Description: 带有fifo的功能模块，具有发送模块和接收功能模块(The function module with FIFO has transmitting module and receiving function module)
Platform: | Size: 145408 | Author: 陈陈陈啊 | Hits:

[VHDL-FPGA-Verilog] UART-HPY

Description: 利用FPGA实现了UART编解码功能，已在Xilinx及Altera多种型号FPGA例化使用。附有寄存器使用说明。(a useful UART decoder and encoder.)
Platform: | Size: 48128 | Author: 帕萨迪纳 | Hits:

[Documents] 基于FPGA的串口通信系统

Description: 该设计是基于 FPGA 的串口通信系统模拟仿真，通过对 RS-232 串行总线接口的设计，掌握发送与接收电路的基本思路，并进行串口通信。采用 Verilog HDL 语言对 UART 波特率产生模块、数据发送模块、接收模块进行硬件描述，再将其整合为一个 RS-232 收发模块，最终在顶层模块中将两个 RS-232 模块例化，实现两块 FPGA 芯片全双工通信的设计。(Design of serial communication system based on FPGA)
Platform: | Size: 578560 | Author: 小可大本 | Hits:

[VHDL-FPGA-Verilog] UART-Altera

Description: 使用Atera FPGA CycloneII 实现串口通信，遵循RS232协议。FPGA上的模块实现了数据的接收，取补码和发送。(Achieve serial communication with FPGA, following the protocol of RS232.)
Platform: | Size: 1809408 | Author: swy0721 | Hits:

[Com Port] FPGA实现串口解析

Description: 用verilog语言不同的编写方式来实现各种复杂串口通讯(use the verilog to uart)
Platform: | Size: 5120 | Author: huihui2113 | Hits:

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[Other] uart_rx

[Com Port] llm0308_myUART

[VHDL-FPGA-Verilog] Mars_EP1C3_S_Core_V2.0

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] USB

[VHDL-FPGA-Verilog] iic-spi-uart

[VHDL-FPGA-Verilog] UART

[VHDL-FPGA-Verilog] UART

[VHDL-FPGA-Verilog] UART

[VHDL-FPGA-Verilog] UART

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] Uart

[Com Port] uart

[VHDL-FPGA-Verilog] UART-FPGA

[Other] UART

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] UART-HPY

[Documents] 基于FPGA的串口通信系统

[VHDL-FPGA-Verilog] UART-Altera

[Com Port] FPGA实现串口解析

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